Leslie Lamport, the man behind TLA+/TLC, the formal modeling language we used to develop our RTOS kernel has started a series of video lectures on TLA+. If interested in a comprehensive and pragmatic approach to formal modelling, we can only recommend it.
Altreonic is recruiting embedded software engineers. Candidates need to have a good understanding of low level programming (C and assembler), rigorous testing and preferably qualification requirements. Forward your motivated interest and resumé to Annie Dejonghe: a.dejonghe (@) altreonic.com. If selected as a candidate, be prepared for an intellectually challenging test.
Altreonic will be demonstrating VirtuosoNext at the Hannover Messe, 24-28 April on the EUROCPS booth with Thales TRT. Visit us Hall 3, Booth E02
The fine grain memory protection in combination with microsecond real-time performance and a small code size is a breakthrough for VirtuosoNext Designer. In combination with the static programming model that eliminates many known safety and security risks, it delivers unprecedented real-time performance in combination with fine-grain partitioning for safety and security critical applications.
Altreonic has now ported VirtuosoNext™ Designer to the Freescale QorIQ T2080/1 processor. The chip has 8 floating point cores implemented as 4 CPUs with a dual register set running at 1.8 GHz. The latest port of VirtuosoNext Designer delivers unprecedented hard real-time capability in the microsecond range in combination with fine grain task level space and time partitioning for embedded safety-critical applications.
In contrast to traditional hypervisor based partitioning schemes, VirtuosoNext™ protects each application task separately in memory with a real-time response still available in the microseconds range as one expect from using an RTOS. Moreover, the code size is measured in Kbytes, allowing optimal use of the on-chip caches for best performance.
Together they create a powerful and ultra-high bandwidth processing platform ideally suited for computation and bandwidth-intensive high-reliability and safety-critical applications
Chesham, UK – 21st February 2017. Sundance Multiprocessor Technology Ltd., an established supplier and manufacturer of high performance embedded solutions, has collaborated with Altreonic to port its multicore VirtuosoNextTM Designer embedded RTOS to Sundance’s VF360 3U OpenVPX single board computer (SBC), that integrates a Texas Instruments C6678 Keystone multicore DSP alongside an Altera Stratix® V FPGA.
Read more in the attached press release.
2016 has been a difficult year for the world. If engineering trustworthy systems is not easy, engineering a trustworthy world is still beyond our reach. On the other hand, every mishap is an opportunity to do better next time. What seems to be the weak point is passing on the lessons learned. This explains why we have the cycles of Kontradiev and history seems to repeat itself.
Nevertheless, this year we were able to make good progress. GoedelWorks is now a stable engineering platform, VirtuosoNext Designer is now probably the most safe and secure RTOS environment and we applied these technologies in developing the KURT e-vehicle platform into a demonstrator vehicle with first commercial applications. It would be a mistake to assume that this is all a matter of technology. The binding glue is teamwork.
Stay tuned for more in 2017 and wishing you all a better world.
The Altreonic team.
Initiated by Tuur Benoit (Siemens) a new group is being set up around Autonomous Systems. Eric Verhulst will present "The long road from proof of concept to real-world autonomous systems" at the Kick-Off on 26-October-2016, ESAT, Leuven.
For details, visit here.
Altreonic has been selected in the EuroCPS project to port a Flight Management test application with VirtuosoNext on an avionics platform of Thales. EuroCPS is an European funded project focusing on advanced computing and cyber-physical systems. It gathers several design centers in order to boost and initiate synergies between innovative companies, major CPS-platforms and CPS-competency providers. The specific project with Altreonic is labeled NoFiST (Novel Fine Grain Space and Time Partitioning for a Mixed Criticality Platform) and is a cooperation with Thales TRT. Hereby the abstract:
Altreonic has now ported VirtuosoNext™ Designer to the Texas Instruments’ 8-core C6678 DSP of Sundance’ Parsec VF360 VPX board. The board has 8 floating point DSPs and an Altera Stratix-V on board and is a real single chip signal processing embedded super computer. Running at 1.25 GHz, the eight cores deliver together up to 224 GFlops with a peak bandwidth of 16 Gbytes/s.