Call for papers and participation. Deadline extended till 21st February 2014.
This is the first International Workshop on the new topic of Antifragile systems.
“From Dependable to Resilient, from Resilient to Antifragile Ambients and systems”
Keynote speaker: Dr. Kennie H. Jones from NASA kindly agreed to give a keynote speech at ANTIFRAGILE 2014. He will discuss, among other issues, the role that antifragile engineering is playing within NASA and how this research direction may provide an answer to the design challenges of large and complex resilient and antifragile systems.
The ERTS2 Congress is a unique European cross sector event on Embedded Software and Systems, a platform for top-level scientific with representatives from universities, research centers and industries. The previous editions gathered more than 100 talks, 500 participants and 60 exhibitors and is located in the heart of a region where Airbus is a leading player in developing safe air transport systems.
Altreonic will demonstrate the latest version of GoedelWorks and OpenComRTOS Designer.
Wishes on the next page.
1. OpenComRTOS Designer (v.1.6) was enhanced with support for C++ and new services were added.
2. GoedelWorks (v.1.1) features a new navigation tree and now generates dependency trees in graphml for easier processing. A utility was created that facilitates importing existing software projects.
Thanks to the initial feedback and the continuing discussion, the first official version of the ARRL (Assured Reliability and Resilience Level) white paper is not made public. See the attachment below. To foster further the discussion, a LinkedIn discussion group was set up. LinkedIn discussions have played an important role in helping to formulate the initial ARRL concept and we believe that the discussion could deepen and spread the concept further. Thinking and understanding ARRL is not only a matter for safety engineers but will benefit anyone involved with engineering systems. Visit the group here.
Feedback and discussions welcome.
The ARRL (Assured Reliability and Resilience Level) criterion we presented a few weeks ago at the SASSUR/SAFECOMP workshop for the first time was generally well received and appreciated as a new way to look at safety and systems engineering. Of course, a new concept never emerges alone and also in the standards one can find approaches going in the same direction (SEooC, tool qualification, IMA, etc.). We also received very helpful critical remarks and we appreciate this as turning the ARRL criterion into a really usable and normative tool for engineering still requires serious thinking and refinement.
This process is on-going and you can meet and discuss with Altreonic at following upcoming events:
1. ADCSS workshop at ESTEC (Noordwijk)
The 7th ESA Workshop on Avionics Data, Control and Software Systems will take place from 22 till 24th October. This workshop discusses scientific as well as technical choices to be made to achieve a greater reuse of on-board electronics and software. Details can be found at the ESA website.
2. ICSSEA 2013 Conference (Paris)
Sponsored by AFIS (the French Association for Systems Engineering) and INCOSE, co-organized by TELECOM ParisTech, CS Communication & Systems, and the Génie Logiciel, the 25th edition of the ICSSEA Conference (International Conference on Software & Systems Engineering and their Applications) will be held in Paris on November 4-6, 2013. It aims at providing a critical survey of the status of tools, methods, and processes for elaborating software & systems. Details can be found at the ICSEEA website.
Dr. Bernhard Sputh of Altreonic will present "From safety integrity level to assured reliability and resilience level for composable safety critical systems".
3. IEEE ISSRE 2013 Symposium (Passedena)
The 24th IEEE International Symposium on Software Reliability Engineering will take place November 4-7 in Passadena, CA, USA. More details on the ISSRE website.
Eric Verhulst will present the ARRL criterion in the Industry Papers track.
Altreonic announces integrated FPGA support for its multicore/manycore capable OpenComRTOS Designer on Microsemi’s SmartFusion-II.
Advanced chip technology has in the last decade reached a level of integration whereby complete systems can now be made available in a single package. Such Systems On a Chip (SoC) contains often multiple types of processor cores, each specialized for their function, but also smart I/O blocks, on chip networks, caches and program as well as data memory. Recent chips also add FPGA logic blocks.
Since 2005 Altreonic has developed a formally developed runtime system and development environment called OpenComRTOS Designer. Formally developed, it has a typical code size of 5 to 10 KB and supports systems in a fully scalable way. It transparently supports systems with heterogeneous processing nodes as well as heterogeneous communication mechanisms. This makes it suitable for networked, distributed systems as well as for on-chip many/multicore SoC. Board Support packages have been developed for example for TI’s C6678 8-core multi-DSP, Intel’s 48-core SCC as well as for multicore ARM and PPC systems, often replacing traditional memory hungry POSIX-style RTOS.
Today, Altreonic announces integrated FPGA support, demonstrated on Microsemi’s SmartFusion-II. On this chip the user finds a 166 MHz ARM Cortex M3, DMA, I/O blocks and memory as well as a flash programmable FPGA logic. Traditional approaches will treat the FPGA as a co-processing block that is explicitly accessed using dedicated software running on the ARM. In OpenComRTOS tasks synchronise and communicate using so-called intermediate “hub entities” that fully decouple tasks allowing them to be anywhere in the network whereby OpenComRTOS takes cares of the inter-node communication.
Altreonic will present the novel ARRL criterion at the SASSUR (Next Generation of System Assurance Approaches for Safety-Critical Systems) workshop of SAFECOMP2013 on 24th September in Toulouse, France. The paper is co-authored with the Simula Research Lab in Norway (Jose Luis de la Vara) and the University of Antwerp (Vincenzo di Florio).
In summary: ....
Altreonic has recently added new features to its network-centric RTOS that make programming systems with multiple, even heterogeneous processors even easier than before. The new support extend the virtual shared memory and virtual single processor support.
Supports system-wide shared data structures: virtual shared memory model
OpenComRTOS is the unique formally developed RTOS that can program seamlessly even heterogenous systems from a single processor to 1000's of processing nodes. It comes with a visual modeling environment whereby the developer independently specifies his parallel multi-processor target system and application architecture. Tasks and interaction entities can then be transparently mapped to any node in the system, even when the processors are of a different type. With prioritised scheduling and support for distributed priority inheritance, the system remains real time predictable with a typical code size of less than 10 KB per processing node. From v.1.6 of the OpenComRTOS Designer environment on, the developers benefits from a streamlined kernel source code and new features. OpenComRTOS Designer is however a lot more than an RTOS. Read further ....
Altreonic is pleased to release a new publication in its Gödel Series, entitled: "QoS and Real Time Requirements for Embedded Many- and Multicore Systems". While the first part is mainly a short summary on real-time scheduling, mostly Rate Monotonic Scheduling and Priority Inheritance support, it already establishes the jump to distributed real-time scheduling as supported in OpenComRTOS.
The second part takes a closer look at modern advanced many/multi-core architectures, interrupt latency and inter-core communication measurements and makes the argument that the sharing of the on-chip resources, including the caches, makes it very hard to predict the temporal properties of an application. Rather than rejecting such advanced architectures, the argument is made to adapt the programming model to be able to handle the stochastic spread rather than trying to control it, even if a good design will try to minimise the spread.
Lastly, the bridge is made from Real-Time scheduling towards Quality of Service scheduling of on-chip resources. The connection is made with the specific case of Safety Integrity Levels. Finally, a proposal is made for a new concept that allows to classify components in terms of the assurance they provide for their functional requirements when resources are failing. Under the name ARRL (Assured Reliability and Resilience Level) it provides guidelines for selecting adequate architectures that allow to provide the required services in the presence of several classes of faults. This topic is the subject of on-going and future publications and provides the basis for extensions to the runtime support in OpenComRTOS.
The booklet if freely downloaded from Altreonic's website.